Jing-Yang Jou(周景揚)





        Jing-Yang Jou received the B.S. degree in electrical engineering from National Taiwan University, Taiwan, R.O.C., and the M.S. and Ph.D. degrees in computer science from the University of Illinois at Urbana-Champaign, in 1979, 1983, and 1985, respectively.
        He is currently the Director General of National Chip Implementation Center, National Applied Research Laboratories in Taiwan. He is a full Professor and was Chairman of Electronics Engineering Department from 2000 to 2003 at National Chiao Tung University, Hsinchu, Taiwan. Before joining Chiao Tung University, he was with GTE Laboratories from 1995 to 1996 and with AT&T Bell Laboratories at Murray Hill from 1986 to 1994.
        He received the distinguished paper award of the IEEE International Conference on Computer-Aided Design in 1990, the Outstanding Academy-Industry Cooperation Achievement Award granted by Ministry of Education (MOE), Taiwan, in 2002, and the Outstanding Electrical Engineering Professor Award from CIEE in 2006. His research interests include logic and physical synthesis, design verification, CAD for low power and Network on Chips. He has published more than 160 technical papers.
        Dr. Jou is a Fellow of IEEE. He is elected to the President of the Taiwan Integrated Circuit Design Society (TICD) 2007-2008. He was the Technical Program Chair of the Asia-Pacific Conference on Hardware Description Languages (APCHDL’97), the Technical Program Chair of the 12th VLSI Design/CAD Symposium (2001), the Executive Chair of the 2nd Taiwan-Japan Microelectronics International Symposium (2002), the Honorary Chair of International Workshop on Multi-Project Chip (IWMC’06, 2006), and the Program Chair of the 2007 VLSI-DAT.

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