Photo

Albert Chin(荊鳳德)

No.1001, Dasyue Rd., Hsinchu City 300, Taiwan
ED633
Tel: 03-573-1841
FAX: 03-572-4361
achin@cc.nctu.edu.tw

Background

Research

Introduction

        Albert Chin (SM’94) received the Ph.D. from the Department of Electrical Engineering, University of Michigan, Ann Arbor, in 1989.
        
        He was with AT&T-Bell Labs from 1989 to 1990, General Electric-Electronic Lab from 1990 to 1992, and visited Texas Instruments’ Semiconductor Process & Device Center (SPDC) from 1996 to 1997. He is a Professor at National Chiao Tung Univ., and visiting Professor at Si Nano Device Lab, National Univ. of Singapore. He has published more than 300 technical papers and presentations. His research interests include Si VLSI, RF and III-V devices. He is a pioneer in high-k ?ngate dielectric and metal-gate research (Al2O3, La2O3, LaAlO3 and HfLaO with NiGe, YbSi2, and Ir3Si metal gates) for low DC power consumption CMOS, which result in largely improved DC leakage current in CMOS technology. He invented the Ge-On-Insulator (GOI) CMOS to enhance the mobility, 3 Dimensional IC to solve the AC power consumption and able to extend the VLSI scaling, resonant cavity photo-detector for high gain-bandwidth product, and high mobility strain-compensated HEMT. Using the high-k Al(Ga)N and HfON technology, largely improved MONOS non-volatile memory with fast program/erase speed, large memory window and good retention at record low <±5V write for SoC are simultaneously achieved. The high-k TiTaO and STO MIM he developed with k=45~169 can meet ITRS requirement of analog capacitor to year 2018. He also developed the high performance RF passive devices on VLSI-standard Si substrate using ion implantation to convert into semi-insulating; much-improved RF device performance close to GaAs has been realized up to 100 GHz. The developed metal-gate/high-k/[Si or GOI] MOSFETs, MOLNOS memory, high density MIM capacitor and RF devices on process converted semi-insulating Si are followed by research labs, universities worldwide and in pilot runs at IC fabs. He is currently working on metal-gate/high-k nano-CMOS, quantum-trap nano memory, very high density MIM capacitor and RF Si technologies.
        
        Dr. Chin has given invited talks at the IEDM and other conferences in the US, Europe, Japan, Korea (i.e., Samsung Electronics), etc. He also served as a committee member in IEDM.
        
        

Lab. Website or Detailed C.V.

ED 633

Course

HomePage

http://web.it.nctu.edu.tw/~achin/