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簡昭欣(Chien, Chao-Hsin)

公:5712121-54252
宅:0968389897
chchien@faculty.nctu.edu.tw

個人網頁:

實驗室網頁或詳細履歷:

奈米元件與記憶體實驗室

學經歷

研究方向

簡介

        簡昭欣,1968年5月24日生。台灣南投縣人,交通大學電子工程系學士,交通大學電子工程系博士。1999年9月,至國家奈米元件實驗室擔任副研究員。現任國立交通大學電子系所教授。
        著作發表(Publications):
        論文著作發表(Publications):
        一、國際期刊(International Journal)
        1. Hou-Yu Chen, Chun-Chi Chen, Fu-Kuo Hsueh, Jan-Tsai Lin, Chih-Yen Shen, Chiung-Chih Hsu, Shyi-Long Shy, Bih-Tiao Lin, Cheng-San Wu, Chao-Hsin Chien, Chenming Hu, Chien-Chao Huang and Fu-Liung Yang , “A Novel Nano-Injection Lithography Application for 15-nm Node Device Fabrication”, (submitted to Trans. on Electron Devices).
        2. Hou-Yu Chen, Chia-Yi Lin, Min-Cheng Chen, Chien-Chao Huang, and Chao-Hsin Chien ,”NiSi Formation using Pulsed Laser Annealing for nMOSFET Performance Improvement” (submit to Journal of Electrochemical Society)
        3. Hou-Yu Chen, Min-Cheng Chen, Chia-Yi Lin, Chung-Fan Hsieh*, Jim-Tong Horng*, Jian-Tai Qiu*, Chien-Chao Huang, Chao-Hsin Chien and Fu-Liang Yang,“ A System-on-Chip Nanowire Biosensor with Hybrid Sensor/Memory/CMOS Technology in BEOL-compatible Process”, Submitted to Nanotechnology.
        4. Yi-Hsien Lu, Chao-Hsin Chien, Po-Yi Kuo,a Ming-Jui Yang, Hsiao-Yi Lin and Tien-Sheng Chao “High-Performance Poly-Si TFTs of Top-Gate with High-Metal-Gate Combine the Laser Annealed Channel and Glass Substrate” Electrochem. Soc. Lett. 14 (1) H17-H20 (2011)
        5. Hou-Yu Chen, Chia-Yi Lin, Chien-Chao Huang and Chao-Hsin Chien, “The effect of pulsed laser annealing on the nickel silicide formation”, Microelectronic Engineering, 87, p.2540 (2010).
        6. Hou-Yu Chen , Chia-Yi Lin , Min-Cheng Chen , Chien-Chao Huang , and Chao-Hsin Chien, “Fabrication of High- Sensitivitye Poly-Si Nanowire FET pH Sensor using Conventional CMOS Technology”, Jpn. Journal of Applied Physics,Vol. 39, pp.060221-060221-4,2010.
        7. Guang-Li Luo, Zong-You Han, Chao-Hsin Chien, Chih-Hsin Ko, Clement H. Wann, Hau-Yu Lin, Yi-Ling Shen, Cheng-Ting Chung, Shih-Chiang Huang, Chao-Ching Cheng, and Chun-Yen Chang “Ge epitaxial growth on GaAs substrates for application to Ge-source/drain GaAs MOSFETs” J. Electrochem. Soc., 157 (1)H27-H30 (2010) (0.9)
        8. Guang-Li Luo, Shih-Chiang Huang, Chih-Hsin Ko, Clement H. Wann, Chao-Ching Cheng, Chun-Yen Chang, Wen-Chin Lee, Zong-You Han, Cheng-Ting Chung, Hau-Yu Lin, and Chao-Hsin Chien “ The annihilation of threading dislocation in the germanium epitaxially grown within the nanoscale silicon trenches” J. Electrochem. Soc. 156(9),H703-706(2009)
        9. Chao-Ching Cheng, Chao-Hsin Chien, Guang-Li Luo, Ching-Lun Lin, Hung-Sen Chen, Jun-Cheng Liu, Chi-Chung Kei Chien-Nan Hsiao, and Chun-Yen Chang,”Studies of Junction and Device Characteristics of Gate-Last Ge p- and n-MOSFETs with ALD-Al2O3 Gate Dielectric” IEEE Trans. Electron Devices, Vol.56, No.8,pp.1681-1689,2009.
        10. Chao-Ching Cheng, Chao-Hsin Chien, Guang-Li Luo, Yu-Ting Ling, Ruey-Dar Chang, Chi-Chung Kei, Chien-Nan Hsiao, Jun-Cheng Liu, and Chun-Yen Chang, “Effects of Minority-Carrier Response Behavior on Ge MOS Capacitor Characteristics: Experimental Measurements and Theoretical Simulations”, IEEE Trans. Electron Devices, Vol.56, No.5,pp.1118-1127,2009.
        11. Chao-Ching Cheng, Chao-Hsin Chien, Guang-Li Luo, Jun-Cheng Liu, Yi-Cheng Chen, Yao-Feng Chang, Shin-Yuan Wang, Chi-Chung Kei, Chien-Nan Hsiao, and Chun-Yen Chang, “Five-Element Circuit Model Using Linear Regression Method to Correct the Admittance Measurement of MOS Capacitor”, J. Vac. Sci. Technol. B, 27(1),p.p. 130-132,2009.
        12. Ming-Jui Yang, Chao-Hsin Chien, Chih-Yen Shen, and Tiao-Yuan Huang ”Properties of Ge films grown Through Inductively Coupled Plasma Chemical Vapor Deposition at Low Temperature on SiO2 Substrates” J. Electrochem. Soc. 155, H363 (2008).
        13. Ming-Jui Yang, Chao-Hsin Chien, Yi-Hsien Lu, Chih-Yen Shen and Tiao-Yuan Huang, “Electrical Properties of Low Temperature Compatible P-Channel Polycrystalline Silicon TFTs Using High- Gate Dielectrics, IEEE Trans. Elec. Dev. Vol. 55, No. 4, pp.1027-1034, 2008.
        14. Chao-Ching Cheng, Chao-Hsin Chien, Guang-Li Luo, Jun-Cheng Liu, Chi-Chung Kei, Da-Ren Liu, Chien-Nan Hsiao, Chun-Hui Yang, and Chun-Yen Chang, “Characteristics of atomic-layer-deposited Al2O3 high-k dielectric films grown on Ge substrates”, J. Electrochem. Soc., vol.155, pp. G203-G208, 2008.
        15. Chao-Ching Cheng, Chao-Hsin Chien, Guang-Li Luo, Chun-Hui Yang, Ching-Chih Chang, Chun-Yen Chang, Chi-Chung Kei, Chien-Nan Hsiao, and Tsong-Pyng Perng, “Effects of interfacial sulfidization and thermal annealing on the electrical properties of an atomic-layer-deposited Al2O3 gate dielectric on GaAs substrate”, J. Appl. Phys., vol.103, p.074102, 2008.
        16. Chao-Ching Cheng, Chao-Hsin Chien, Guang-Li Luo, Chun-Hui Yang, Chih-Kuo Tseng, Hsin-Che Chiang, and Chun-Yen Chang, “Improved electrical properties of Gd2O3/GaAs capacitor with modified wet-chemical clean and sulfidization procedures”, J. Electrochem. Soc., vol.155, pp. G56-G60, 2008.
        17. Shao-Ming Yang, Chao-Hsin Chien, Jiun-Jia Huang, Tan-Fu Lei, Ming-Jinn Tsai and Lurng-Shehng Lee, “Cerium oxide nanocrystal for nonvolatile memory applications”, Appl. Phys. Lett. 91, 262104, 2007.
        18. Ming-Jui Yang, Chao-Hsin Chien, Yi-Hsien Lu, Guang-Li Luo, Su-Ching Chiu, Chun-Che Lou, and Tiao-Yuan Huang, “High-Performance and Low-Temperature-Compatible P-Channel Polycrystalline-Silicon TFTs Using Hafnium Silicate Gate Dielectric” IEEE Electr. Dev. Lett., Vol. 28, No.10, pp.902-904, 2007.
        19. Chia-Hao Chang, Chao-Hsin Chien and Jung-Yen Yang, “Pentacene-based thin-film transistors with multi-walled carbon nanotube source and drain electrodes,” Appl. Phys. Lett., 91, 083502, 2007.
        20. Yeong-Yuh Chen and Chao-Hsin Chien, “Thickness scaling and reliability Comparison for Inter-poly High-k Dielectrics” IEEE Electr. Dev. Lett.,Vol. 28, No.8, pp.700-702, 2007.
        21. Shih-Chang Chen, Chao-Hsin Chien, Jen Chung Lou,“Anomalous negative bias instability behavior in p-channel metal-oxide-semiconductor field-effect transistors with HfSiON/SiO2 gate stack” Appl. Phys. Lett.90, 233505, 2007.
        22. Yu-Hsien Lin, Chao-Hsin Chien, Tsung-Yuan Yang and Tan-Fu Lei,“2-Bit Lanthanum Oxide Trapping Layer Nonvolatile Flash Memory” J. Electrochem Soc. 154(7), pp.H619-H622, 2007.
        23. Chao-Ching Cheng, Chao-Hsin Chien, Guang-Li Luo, Chun-Hui Yang, Mei-Ling Kuo, Je-Hung Lin, Chih-Kuo Tseng, and Chun-Yen Chang, “Study of Thermal Stability of HfOxNy/Ge Capacitors Using Post-deposition Annealing and NH3 Plasma Pretreatment” J. Electrochem Soc. 154(7), pp.G155-G159, 2007.
        24. Shao-Ming Yang, Chao-Hsin Chien, Jiun-Jia Huang and Tan-Fu Lei, “Nonvolatile Flash Memory Devices Using CeO2 Nanocrystal Trapping Layer” Jan. J. Appl. Phys., Vol. 46, No. 6A, pp.3291-3295, 2007.
        25. Yu-Hsien Lin, Chao-Hsin Chien, Tung-Huan Chou, Tien-Sheng Chao and Tan-Fu Lei “Impact of Channel Dangling Bonds on Reliability Characteristics of Flash Memory on Poly-Si Thin Films” Electr. Dev. Lett., Vol.28, No.4, p.267-269, 2007.
        26. Chao-Ching Cheng, Chao-Hsin Chien, Guang-Li Luo, Chun-Hui Yang, Mei-Ling Kuo, Je-Hung Lin, and Chun-Yen Chang, “Ultrathin Si capping layer suppresses charge trapping in HfOxNy/Ge metal-insulator-semiconductor capacitors”, Appl. Phys. Lett. 90, 012905 (2007).
        27. Guang-Li Luo, Yen-Chang Hsieh, Edward Yi Chang, and M. H. Pilkuhn, Chao-Hsin Chien, Tsung-Hsi Yang, Chao-Ching Cheng, and Chun-Yen Chang, “High-speed GaAs metal gate semiconductor field effect transistor structure grown on a composite Ge/GexSi1−x/Si substrate”, J. Appl. Phys., 101, 084501, 2007.
        28. Ching-Chich Leu, Chia-Feng Leu, Chao-Hsin Chien, Ming-Jui Yang, Rui-Hao Huang, Chen-Han Lin, and Fan-Yi Hsu, ” Properties of Pt/SrBi2Ta2O9/BL/Si MFIS structure containing HfO2, SiO2, and Si3N4 buffer layer“ Electrochemical and Solid-State Letters, 10(5) G25-G28,2007.
        29. Yu-Hsien Lin, Chao-Hsin Chien, Tung-Hung Chou, Tien-Sheng Chao, and Tan-Fu Lei, “Low-Temperature Polycrystalline Silicon Thin-Film Flash Memory with Hafnium Silicate”, IEEE Trans. Electr. Dev. Vol.54, No.3, pp.531-536, 2007.
        30. Fan-Yi Hsu, Ching-Chich Leu, Chao-Hsin Chien and Chen-Ti Hu, “ Influence of Ta content on the physical properties of SrBi2Ta2O9 ferroelectric thin films” J. of Mater. Res. Vol. 21, No.12, pp.3124-3133, Dec., 2006.
        31. Yu-Hsien Lin, Chao-Hsin Chien, Ching-Tzung Lin, Chun-Yen Chang, and Tan-Fu Lei “Novel Two-Bit HfO2 Nanocrystal Nonvolatile Flash Memory”, IEEE Trans. Electr. Dev. Vol.53, No.4, p.782-789, 2006.
        32. Chia-Pin Lin, Bing-Yue Tsui, Ming-Jui Yang, Ruei-Hao Huang, and Chao-Hsin Chien, “High performance poly-silicon thin film transistors using HfO2 gate dielectrics”, Electr. Dev. Lett., Vol.27, No.5, p.360-363, 2006.
        33. M. N. Chang, C. Y. Chen, M. J. Yang, and C. H. Chien, “Photovoltaic effect on the conductive atomic force microscopic characterization of thin dielectric films”, Appl. Phys. Lett., vol.89, p.133109, 2006.
        34. Wen-Tai Lu, Chao-Hsin Chiein, Wen- Ting Lan, Tsung-Chieh Lee, Peer Lehnen and Tiao-Yuan Huang “Improved Reliability of HfO2/SiON Gate Stack by Fluorine Incorporation”, Electr. Dev. Lett. Vol.27, No.4, pp.240-242, 2006.
        35. Yu-Hsien Lin, Chao-Hsin Chien, Chun-Yen Chang, and Tan-Fu Lei,”Annealing Temperature Effect on the Performance of Nonvolatile HfO2 SONOS-type Flash Memory”, J. Vac. Sci. Tech., Vol. 24, pp.682-685, May, 2006.
        36. Chao-Ching Cheng, Chao-Hsin Chien, Guang-Li Luo, Je-Hung Lin, Shih-Lu Hsu, Chun-Hui Yang, and Chun-Yen Chang, “Thermochemical reaction of ZrOx(Ny) interfaces on Ge and Si substrates”, Appl. Phys. Lett., vol.80, p.012905, 2006.
        37. Chao-Ching Cheng, Chao-Hsin Chien, Ching-Wei Chen, Shih-Lu Hsu, Chun-Hui Yang, and Chun-Yen Chang, “Effects of Postdeposition Annealing on the Characteristics of HfOxNy Thin Films on Germanium and Silicon Substrates”, J. Electrochem. Soc., 153, pp. F160-F168, 2006.
        38. Wen-Tai Lu, Chao-Hsin Chien, Wen-Ting Lan, Tsung-Chieh Lee, Ming-Jui Yang, Shih-Wen Shen, Peer Lehnen and Tiao-Yuan Huang, ”Improvement on the electrical characteristics of pMOSFETs with HfO2 gate stacks by Post-Deposition N2O plasma treatment”, Jap. J. Appl. Phys., Vol. 44, No.11, pp.7869-7875, 2005.
        39. Wen-Tai Lu, Chao-Hsin Chien, Ing-Jye Huang, Ming-Jui Yang, Peer Lehnen and Tiao-Yuan Huang,” Effects of low-temperature NH3-treatment on the characteristics of HfO2/SiO2 gate stack”, J. Electrochem. Soc., 152, pp. G799-G803, 2005.
        40. Shih-Lu Hsu, Chao-Hsin Chien, Ming-Jui Yang, Rui-Hao Huang, Ching-Chich Leu, and Shih-Wen Shen, Tsung-Si Yang,” Study of thermal stability of nickel monogermanide on single- and polycrystalline germanium substrates” Appl. Phys. Lett. 86, p.251906, 2005.
        41. Shen De Wang, Tzu Yun Chang, Chao Hsin Chien, Wei Hsiang Lo, Jen Yi Sang, Jam Wen Lee and Tan Fu Lei, “Performance and Reliability of Poly-Si Thin-Film Transistors on FSG Buffer Layer” Electr. Dev. Lett. Vol.26, No.7, pp.467-469, 2005.
        42. C.C. Cheng, C.H. Chien, C.W. Chen, S.L. Hsu, M.Y. Yang, C.C. Huang, F.L. Yang, C.Y. Chang” Impact of post-deposition-annealing on the electrical characteristics of HfOxNy gate dielectric on Ge substrate” Microelec. Engineering, 80, pp.30-33, (2005).
        43. Ching-Wei Chen, Chao-Hsin Chien, Tsu-Hsiu Perng, Shih-Chich Ou, Da-Yuan Lee, Yi-Cheng Chen, Horng-Chich Lin, Tiao-Yuan Huang, and Chun-Yen Chang,”Hot Electron Induced Electron Trapping in 0.13 ?慆 nMOSFETs with Ultri-thin (EOT=1.6 nm) Nitirded Gate Oxide,” Electrochem. Solid-State Lett. 8, G187, 2005.
        44. Ching-Wei Chen, Chao-Hsin Chien, Yi-Cheng Chen, Shih-Lu Hsu, and Chun-Yen Chang “Reliability of Strained SiGe Channel pMOSFETs with Ultra-Thin (EOT = 3.1 nm) N2O-Annealed SiN Gate Dielectric,” Jap. J. Appl. Phys., Vol.44, No.6, pp.3848-3853, 2005.
        45. Ming-Jui Yang, Jiann Shieh, Shih-Lu Hsu, Ing-Jye Huang, Ching-Chich Leu, Shih-Wen Shen, Chao-Hsin Chien, Tiao-Yuan Huang and Peer Lehnen” Low-temperature growth of polycrystalline Ge films on SiO2 substrate by high density plasma chemical vapor deposition” Electrochem. Soc. Lett.8 (5) C-74-C76, 2005.
        46. Ching-Wei Chen, Chao-Hsin Chien, Yi-Cheng Chen, Shih-Lu Hsu, and Chun-Yen Chang “Deep Sub-Micron Strained Si0.85Ge0.15 Channel pMOSFETs with Ultra-Thin N2O-Annealed SiN Gate Dielectric” Jpn. J. Appl. Phys., Vol.44, No.9, pp.L278 - L281, 2005.
        47. Ching-Chich Leu, Chao-Hsin Chien, Chih-Yuan Chen, Mao-Nan Chang, Fan-Yi Hsu, Chen-Ti Hu, Yung-Fu Chen “Photoperturbation-induced differential capacitance variation in SrBi2Ta2O9 ferroelectric film” Appl. Phys. Lett. 85, 092906, 2005.
        48. Yu-Hsien Lin, Chao-Hsin Chien, Ching-Tzung Lin, Chun-Yen Chang and Tan-Fu Lei “High Performance Nonvolatile HfO2 Nanocrystal Memory” Electr. Dev. Lett. Vol.26, No.3, p.154, 2005.
        49. Yeong Yuh Chen, Chao Hsin Chien and Jen Chung Lou “Characteristics of the Al2O3 interpoly dielectrics on NH3-nitrided bottom poly-Si for next generation Flash memories” Jan. J. Appl. Phys., Vol. 44, No. 4A, pp.1704-1710, 2005.
        50. Ching-Wei Chen, Chao-Hsin Chien, Tsu-Hsiu Perng, Ming-Jui Yang, Jann-Shyang Liang, Peer Lehnen, Bing-Yue Tsui, and Chun-Yen Chang “Electrical Characteristics of Thin HfO2 Gate Dielectrics Prepared using Different Pre-Deposition Surface Treatments," Jan. J. Appl. Phys., Vol. 44, No. 1A, pp.87-93, 2005.
        51. Tsu-Hsiu Perng, Chao-Hsin Chien, Ching-Wei Chen, Chun-Yen Chang, Tiao-Yuan Huang and Peer Lehnen” HfO2 MIS Capacitor Using Copper Gate Electrode” Electr. Dev. Lett. Vol.25, No.12, p.784, 2004.
        52. Tsu-Hsiu Perng, Chao-Hsin Chien, Ching-Wei Chen, Peer Lehnen, and Chun-Yen Chang “High Density MIM Capacitors with HfO2 Dielectrics”, Thin Solid Films, 469-470, pp.345-349, 2004.
        53. Wen-Tai Lu, Po-Ching Lin and Tiao-Yuan Huang, Chao-Hsin Chien and Ming-Jui Yang “The characteristics of hole trapping in HfO2/SiO2 gate dielectrics with TiN gate electrode” Appl. Phys. Lett. Oct. 2004
        54. Ching-Chich Leu, Chiung-Chih Hsu, Chao-Hsin Chien, Chia-Feng Leu, Fan-Yi Hsu and Chen-Ti Hu, ” The Pt nanocrystalline interfacial layer in a SBT/Pt/Ti ferroelectroc capacitor” Electrochemical and Solid-states Lett.Vol.7, No.11, pp.F67-F69, 2004.
        55. Y. F. Chen, S.W. Chen, L. Y. Tsai, Y. C. Chen, Chao-Hsin Chien, “Efficient sub-nanosecond intracavity optical parametric oscillator pumped with a passively Q-switched Nd:GdVO4 laser” Appl.Phys. B, 001-3, 2004.
        56. Ching-Chich Leu, Chao-Hsin Chien, Chih-Yuan Chen, and Mao-Nan Chang Fan-Yi Hsu, Chen-Ti Hu, ” Contrast mechanism of ferroelectric domains in scanning capacitance microscopy” Electrochemical and Solid-states Lett., Vol.7, No.10, p. A327, 2004.
        57. Ching-Chich Leu, Chao-Hsin Chien, Fan-Yi Hsu, Hung-Tao Lin, and Chen-Ti Hu, ”Influence of Ultrathin Tantalum Buffer Layers on Microstructure and Ferroelectric Properties of SrBi2Ta2O9 Thin Films” J. Electrochemical Society., Vol.8, No.151, p.F167, 2004.
        58. Chao-Hsin Chien, Ding-Yeong Wang, Ming-Jui Yang, Peer Lehnen, Ching-Chich Leu, Shiow-Huey Chuang, Tiao-Yuan Huang, and C. Y. Chang, “High Performance Pt/SrBi2Ta2O9/HfO2/Si Structure for Nondestructive Readout Memory,” Electr. Dev. Lett., Vol.24, No. 9, p.553, 2003.
        59. Yeong-Yuh Chen, Chao-Hisn Chien and Jen-Chung Lou, “High Quality Al2O3 Interpoly Dielectric (IPD) with NH3 Surface Nitridation,” Electr. Dev. Lett., Vol.24, No. 8, p.503, 2003.
        60. Ching-Chich Leu, Chih-Yuan Chen, Chao-Hsin Chien, Mao-Nan Chang, Fan-Yi Hsu, Chen-Ti Hu, “Domain structure study of SrBi2Ta2O9 ferroelectric thin films by scanning capacitance microscopy," Appl. Phys. Lett., Vol.82, No.20, p.3493, 2003.
        61. Tsu-Hsiu Perng, Chao-Hsin Chien, Ching-Wei Chen, Horng-Chih Lin, Chun-Yen Chang, and Tiao-Yuan Huang, “Enhanced Negative Substrate Bias Degradation in nMOSFETs with Ultrathin Plasma Nitrided Oxide”, Electr. Dev. Lett., Vol.24, No. 5, p.333, 2003.
        62. Ding-Yeong Wang, Chao-Hsin Chien, Chun-Yen Chang, Ching-Chich Leu, Jung-Yen Yang*, Shiow-Huey Chuang, and Tiao-Yuan Huang, “Low-pressure crystallization of sol-gel-derived PbZr0.52Ti0.48O3 thin films at low temperature for low voltage operation” Jpn. J. Appl. Phys., Vol. 42, No. 5A, p.2756, 2003.
        63. Chia-Hsing Huang, Tseung-Yuen Tseng, Chao-Hsin Chien, Ming-Jui Yang, Ching-Chich Leu, Ting-Chang Chang, Po-Tsun Liu, and Tiao-Yuan Huang, “Electrical properties of metal–ferroelectric–insulator–semiconductor using sol–gel derived SrBi2Ta2O9 film and ultra-thin Si3N4 buffer layer” Thin Solid Film, 420-421, p.377, 2002.
        64. Ching-Chich Leu, Hung-Tao Lin, Chen-Ti Hu, Chao-Hsin Chien, Ming-Jui Yang, Ming-Che Yang and Tiao-Yuan Huang, “Effects of Titanium and Tantalum Adhesion Layers on the Properties of Sol-gel Derived SrBi2Ta2O9 Thin Films,” J. Appl. Phys., Vol. 92, No. 3, p.1511, 2002.
        65. Ching-Chich Leu, Chao-Hsin Chien, Ming-Jui Yang, Ming-Che Yang, and Tiao-Yuan Huang, Hung-Tao Lin, Chen-Ti Hu, “Effects of ultra-thin tantalum seeding layers on sol-gel derived SrBi2Ta2O9 thin films,” Appl. Phys. Lett., Vol.80, p.4600, 2002.
        66. T. M. Pan, C.H. Chien, T. F. Lei, T. S. Chao and T. Y. Huang,” Electrical Characteristics of Thin Cerium Oxide Film on Silicon Substrate by Reactive DC Sputtering,” Electrochem. and Solid-State, Lett. 4(9), p.1, 2001.
        67. Ching-Chich Leu, Chao-Hsin Chien, Ming-Jui Yang and Tiao-Yuan Huang, Ming-Che Yang, Chen-Ti Hu, “ Effects of tantalum adhesion layer on the properties of SrBi2Ta2O9 ferroelectric thin film,” Appl. Phys. Lett. , vol. 79, p.3833, 2001.
        68. Ming-Jui Yang, Chao-Hsin Chien, Ching-Chich Leu, Ren-Jian Zhang, Tiao-Yuan Huang and Tseung-Yuen Tseng, “The Effects of Low Pressure Rapid thermal Post-annealing on the Properties of (Ba,Sr)TiO3 Thin Films Deposited by Liquid Source Misted Chemical Vapor Deposition,” Jpn. J. Appl. Phys., Vol. 40, No 12A, pp.L1-L3, 2001.
        69. C. C. Chen, H. C. Lin, C. Y. Chang, M. S. Liang, C. H. Chien, S. K. Hsien, T. Y. Huang, and T. S. Chao, “Plasma-Induced Charging Damage in Ultrathin (3nm) Gate Oxide,” IEEE Trans. On Electron Devices, pp. 1355-1360, 2000.
        70. C. C. Chen, H. C. Lin, C. Y. Chang, M. S. Liang, C. H. Chien, S. K. Hsien, and T. Y. Huang, “ Improved Immunity to Plasma damage in Ultra-Thin Nitrided Oxides,” IEEE Electron Device Letters, vol. 21, no. 1, pp.15-17, 2000.
        71. H. C. Lin, C. C. Chen, M. S. Liang, S. K. Hsien, C. H. Chien, T. Y. Huang, C. Y. Chang, “ Oxide Thickness Dependence of Plasma Charging Damage,” Microelectronics Reliability, vol. 39, pp.357-364, 1999.
        72. C. C. Chen, H. C. Lin, C. Y. Chang, M. S. Liang, C. H. Chien, and T. Y. Huang, “ Temperature-Accelerated Dielectric Breakdown in Ultra-Thin Gate Oxides,” Appl. Phys. Lett, vol. 74, no.24, pp.3708-3710, 1999.
        73. H. C. Lin, C. C. Chen, C. H. Chien, S. K. Hsien, M. F. Wang, T. S. Chao, T. Y. Huang, and C. Y. Chang, “ Evaluation of Plasma Charging Damage in Ultrathin gate Oxides,” IEEE Electron Device Lett., vol. 19, no. 3, pp.68-70, 1998.
        74. Chao-Hsin Chien, Chun-Yen Chang, Horng_Chih Lin, Tsai-Fu Chang, Szu-Kang Hsien, Hau-Chou Tseng, Shean-Guang Chiou and Tiao-Yuan Huang, “The Role of Resist During O2 Plasma Ashing and its Impact on the Reliability Evaluation of Ultrathin Gate Oxides,” Jpn. J. Appl., Phys., vol.36, pp.4866-4873, 1997.
        75. T. S. Chao, C. H. Chien, C. P. Hao, M. C. Liaw, C. H. Chu, C. Y. Chang, T. F. Lei, W. T.Sun and C. H. Hsu, “Suppression of Boron Penetration in p+ -poly-Si Gate Metal-Oxide-Semiconductor Using Nitrogen Implantation,” Jpn. J. Appl., Phys. vol. 36, pp. 1364-1368, 1997.
        76. C. H. Chien , C. Y. Chang, H. C. Lin, T. F. Chang, S. G. Chiou and T. Y. Huang, “Resist-Related Damage on Ultrathin Gate Oxide During Plasma Ashing,” IEEE Trans. Electron Device Lett, Vol. 18, No. 2, pp.33-35, 1997.
        77. C. H. Chien , C. Y. Chang, H. C. Lin, T. F. Chang, S. G. Chiou and T. Y. Huang, “The Role of Resist for Ultrathin Gate Oxide Degradation During O2 Plasma Ashing,” IEEE Trans. Electron Device Lett., Vol. 18, No. 5, p.35-37, 1997.
        78. H. C. Lin, C. H. Chien, and T. Y. Huang, “Characterization of Antenna Effect by Nondestructive Gate Current Measurement,” Jpn. J. Appl. Phys., vol. 35, p.L-1044-1046, 1996.
        79. L. P. Chen, T. C. Chou, C. H. Chien, and C. Y. Chang, “ Studies on damage removing efficiency of B+11 and BF+2 implanted Si0.84Ge0.16 epilayer by rapid thermal annealing,“ Appl. Phys. Lett, 68(2), pp.232-234, 1996.
        80. T. S. Chao, M. C. Liaw, C. H. Chu, C. Y. Chang, C. H.Chien, C. P. Hao, and T. F. Lei, “Mechanism of nitrogen coimplant for suppression boron penetration in p+-poly-Si gate of p metal-oxide-semiconductor field effect transistor,” Appl. Phys. Lett, 69(2), p.1781-1783, 1996.
        
        二、國際研討會 (International Conference)
        1. Hou-Yu Chen, Chia-Yi Lin, Min-Cheng Chen, Hsiu-Chih Chen, , Chien-Chao Huang, and Chao-Hsin Chien, “Fabrication of CMOS-compatible A Low-cost CMOS Integrated Poly-Si Nanowire FET Sensor“, SSDM 2010.
        2. Guang-Li Luo, Shih-Chiang Huang, Cheng-Ting Chung, Dawei Heh, Chao-Hsin Chien, Chao-Ching Cheng, Yao-Jen Lee, Wen-Fa Wu, Chiung-Chih Hsu, Mei-Ling Kuo, Jay-Yi Yao, Mao-Nan Chang, Chee-Wee Liu, Chenming Hu, Chun-Yen Chang, and Fu-Liang Yang,” A Comprehensive Study of Ge1-xSix on Ge for the Ge nMOSFETs with Tensile Stress Shallow Junctions and Reduced Leakage” 2009 Int. Elec. Dev. Meeting
        3. Cheng-Ting Chung, Shih-Chiang Huang, Guang-Li Luo, Chih-Hsin Ko, Clement H. Wann, Hau-Yu Lin, Zong-You Han, Chao-Ching Cheng, and Chao-Hsin Chien, “Low-dislocation-density 50nm Ge Fin Fabrication on Si substrate, 2009 Int. Conf. on Solid State Devices and Materials (SSDM 2009), Senda, Japan, Oct., pp.174-175, 2009.
        4. Zong-You Han1, Guang-Li Luo, Shih-Chiang Huang, Chih-Hsin Ko, Clement H. Wann3, Hau-Yu Lin, Cheng-Ting Chung, Chao-Ching Cheng, Chun-Yen Chang, and Chao-Hsin Chien, “Heteroepitaxy of SixGe1-x (x < 5%) source/drain on GaAs substratesfor the application of III-V MOSFETs” 2009 Int. Conf. on Solid State Devices and Materials (SSDM 2009), Senda, Japan, Oct, pp.248-249 2009.
        5. C.H.Chang and Chao-Hsin Chien, “ Performanc enhancement of P3HT based TFTs by using MWCNT source and drain” 2009 International Microprocesses and Nanotechnology Conference, Sheraton Sapporo Hotel, Japan, Novmember 242-243,2009. (1)
        6. Chao-Ching Cheng, Chao-Hsin Chien, Guang-Li Luo, Hsin-Che Chiang, Hung-Sen Chen, Ching-Lun Lin, Chi-Chung Kei, Chien-Nan Hsiao, and Chun-Yen Chang, “Minority carrier response characteristics in Germanium MOS capacitor”, 2008 Int. Conf. on Solid State Devices and Materials (SSDM 2008), Ibaraki, Japan, September 24-26, 2008.(1)
        7. Hsin-Che Chiang, Chao-Hsin Chien, Chao-Ching Cheng, Ching-Lun Lin, Chung-Sen Chen, Guang-Li Luo, Yi-Ling Shen, Chi-Chung Kei, and Chien-Nan Hsiao, “Improved electrical characteristics of atomic-layer-deposited Al2O3/GaAs MOS capacitors with (NH4)2S-C4H9OH sulfide treatment”, 2008 Int. Conf. on Solid State Devices and Materials (SSDM 2008), Ibaraki, Japan, September 24-26, 2008. (1)
        8. Chao-Ching Cheng, Chao-Hsin Chien, Guang-Li Luo, Chih-Kuo Tseng, Hsin-Che Chiang, Chun-Hui Yang, and Chun-Yen Chang, “Improved electrical characteristics of Pt/Gd2O3/GaAs MOS capacitors with surface preparation procedures”, 2007 Int. Conf. on Solid State Devices and Materials (SSDM 2007), Ibaraki, Japan, September 18-21, 2007. (1)
        9. Chao-Ching Cheng, Chao-Hsin Chien, Guang-Li Luo, Ching-Chih Chang, Chi-Chung Kei, Chun-Hui Yang, Chien-Nan Hsiao, Tsong-Pyng Perng, and Chun-Yen Chang, “Electrical and material characterization of atomic-layer-deposited Al2O3 gate dielectric on ammonium sulfide treated GaAs substrates”, 17th Int. Vacuum Congress/13th Int. Conf. on Surf. Sci. and Int. Conf. on Nano Sci. and Tech. (IVC-17/ICSS-13 and ICN+T2007), Stockholm, Sweden, July 2-6, 2007.
        10. Jun-Cheng Liu, Chao-Hsin Chien, Chi-Chung Kei, Guang-Li Luo, Chao-Ching Cheng, Chien-Nan Hsiao, Tsong-Pyng Perng, and Chun-Yen Chang, “Al2O3 high-k dielectric films grown by atomic layer deposition on Ge substrate”, AVS 6th Int. Conf. On Atomic Layer Deposition, Seoul, Korea, July 24-26, 2006.
        11. Yu-Hsien Lin, Chao-Hsin Chien, Chun-Yen Chang, and Tan-Fu Lei, “2-Bit Lanthanum Oxide Trappin Layer Nonvolatile Flash Memory”, Intl. Conf. on Sol. Stat. Dev. and Mat., Kanagawa, Japan, p.558, 2006.
        12. Shao-Ming Yang, Chao-Hsin Chien, Jiun-Jia Huang, Yu-Hsien Lin, and Tan-Fu Lei, “Nonvolatile Flash Memory Devices Using CeO2 Nanocrystal Trapping Layer for Two-Bits/Cell Applications,” 3rd Int. Symp. on Advanced Gate Stack Technology (ISAGST), Austin Texas, USA Sep. 27-29, 2006.
        13. Shao-Ming Yang, Chao-Hsin Chien, and Tan-Fu Lei, “Thermal Stability and Electrical Properties and of HfON Gate Dielectric with HfO2 of N2O Treatment,” 3rd Int. Symp. on Advanced Gate Stack Technology (ISAGST), Austin Texas, USA, Sep. 27-29, 2006.
        14. Yu-Hsien Lin, Chao-Hsin Chien, Tung-Hung Chou, Tien-Sheng Chao, Chun-Yen Chang and Tan-Fu Lei “2-bit Poly-Si-TFT Nonvolatile Memory Using Hafnium oxide, Hafnium Silicate and Zirconium silicate” Int. Elec. Dev. Meeting, Washington DC, 2005, pp.949-953.
        15. Yu-Hsien Lin, Chao-Hsin Chien, Chun-Yen Chang and Tan-Fu Lei,“ Annealing Temperature Effect of the Performance of Nonvolatile HfO2 SONOS-type Flash Memory”, 12th Twelfth Canadian Semiconductor Technology Conference, pp.220, Aug. 2005.
        16. Shao-Ming Yang, Chao-Hsin Chien, Shih-Lu Hsu, Yu-Hsien Lin, and Tan-Fu Lei, ”Electrical Characteristics of CeO2 on Epitaxial Germanium Film”, 12th Twelfth Canadian Semiconductor Technology Conference, pp.183, Aug. 2005.
        17. Chao-Ching Cheng, Chao-Hsin Chien, Ching-Wei Chen, Shih-Lu Hsu, Ming-Yi Yang, Chien-Chao Huang, Fu-Liang Yang, and Chun-Yen Chang, “Impact of post-deposition-annealing on the electrical characteristics of HfOxNy gate dielectric on Ge substrate”, Insulating Films on Semiconductors (INFOS), June 22-24, Leuven, Belgium, 2005.
        18. Yu-Hsien Lin, Chao-Hsin Chien, Ching-Tzung Lin, Ching-Wei Chen, Chun-Yen Chang and Tan-Fu Lei “ High Performance Multi-bit Nonvolatile HfO2 Nanocrystal Memory Using Spinodal Phase Seperation of Hafnium Silicate” Intl. Elec. Dev. Meeting (IEDM), San Francisco, 2004, pp.1080-1081.
        19. Wen-Tai Lu, Chao-Hsin Chien, Ying-Chang Lin, Ming-Jui Yang and Tiao-Yuan Huang, “ Effects of Low Temperature NH3 Treatment on HfO2 Stack Gate Dielectrics Fabricated by MOCVD system” accepted by Electrochem. Society Meeting, Fall, 2004
        20. Tsu-Hsiu Perng, Chao-Hsin Chien, Ching-Wei Chen, Peer Lehnen, and Chun-Yen Chang “High Density MIM Capacitors with HfO2 Dielectrics” Proceedings of Int. Conference on Metallurgical Coating and Thin Films(ICMCTF), FP-17, p.87, Apr. 2004.
        21. C.-H. Chen, C.-H.Chien, S.-C.Ou, T.-H. Perng, D.-Y. Lee, Y.-C. Chen, H.-C. Lin, T.-Y. Hunag, and C.-Y. Chang,” Nitrogen-related Enhanced Reliability Degradation in nMOSFETs with 1.6 nm Gate Dielectric” Int. Workshop on Gate Dielectric, Tokyo, p.54, 2003.
        22. H.C. Lin, D.Y. Lee, C.-H. Chien, S.-C. Ou, T.-Y. Hunag, “Impacts of Hole Trapping on the NBTI Degradation and Recovery in PMOS Devices” accepted by International Workshop on Gate Dielectric, Tokyo, 2003.
        23. Tsu-Hsiu Perng, Chao-Hsin Chien, Ching-Wei Chen, and Chun-Yen Chang, “Investigation of HfO2 Dielectrics for Inter-Poly Dielectrics and Metal-nsulator-Metal Capacitors,” Electrochemical Society Proceeding, vol. 2003-14, pp.465-470, 2003.
        24. Ding-Yeong Wang, Chao-Hsin Chien, Ming-Jui Yang, Peer Lehnen, Ching-Chich Leu, Shiow-Huey Chuang, Tiao-Yuan Huang, and C. Y. Chang, “High Performance Pt/SrBiTaO/HfO/Si Structure for 1T Ferroelectric Random Access Memory,” accepted by SSDM, 2003.
        25. Ching-Chich Leu, Chao-Hsin Chien, Tiao-Yuan Huang, Hung-Tao Lin and Chen-Ti Hu “Effects of Seed Layers on Ferroelectric Properties of Sol-Gel Derived SBT Thin Films,” Mat. Res. Soc. Symp. Proc. 718, D10.11, p.189, 2002.
        26. C.C. Chen, H.C. Lin, C.Y. Chang, M.S. Liang, C.H. Chien, S.K. Hsien, and T.Y. Huang,” Plasma-Induced Charging Damage in Ultrathin (3nm) Nitrided Oxides,” 1999 international Symposium on Plasma Process-Induced Damage, pp. 141-144.
        27. H.C. Lin, M. F. Wang, C.C. Chen, S.K. Hsien, C.H. Chien, T.Y. Huang, C.Y. Chang, and T.S. Chao, “ Characterization of Plasma Charging Damage in Ultrathin Oxides,” IEEE International Reliability Physics Symposium, pp.312-317, 1998.
        28. C.H. Chien , C.Y. Chang, H.C. Lin, T.F. Chang, S.G. Chiou and T.Y. Huang, “The Role of Resist in Device Antenna Degradation during O2 Plasma Ashing with Ultrathin Gate Oxieds,” in Proc. of ICRP, p.30-32, 1997.
        29. H.C. Lin, C.H. Perng, C.H.Chien , S.G. Chiou, T.F. Chang, T.Y. Huang, and C.Y.Chang, “Plasma Charging Induced Gate Oxide Damage During Metal etching and Ashing,” 1996 Int. Symposium on Plasma Process-Induced Damage, pp.113-115.
        
        三、專利著作
        (1)呂正傑、簡昭欣、楊明瑞、楊閔智、胡塵滌、黃調元,”鐵電元件之結構”,中華民國專利,公告日期91年11月1日(公告號508796)。
        (2)呂正傑、簡昭欣、楊明瑞、林宏道、胡塵滌、黃調元,”含晶種層之鐵電元件結構及其製造方法”,中華民國專利,公告日期92年7月21日(公告號543094)。
        (3)簡昭欣、林慶宗、林育賢、張俊彥、雷添福,”利用矽酸鉿奈米微粒製備之非揮發性快閃記憶體”,中華民國專利,公告日期94年12月11日(發明第 I 245375號)。
        (4)羅廣禮、簡昭欣,”以(110)單軸拉伸應變提升電子遷移率之N型鍺場效電晶體”,中華民國專利(發明第 I 290360號)。
        (5) 羅廣禮、簡昭欣,”在矽(110)基板上設有壓縮應變矽鍺通道之N型金氧半電晶體架構” 中華民國專利,公開日:中華民國96(2007) 年 9 月 16 日